Sample rate converters are used in a variety of applications. In a television tuner, sample rate converters may be used to synchronize various input and output signals so that those signals may be processed by the tuner. The sample rate converters adjust the sample rate of the various input and output signals to a common sample rate.
In order to adjust the sample rate of the input and output signals, a digital phase lock loop may be used to generate a clock signal for the sample rate converter. The digital phase lock loop may generate the clock signal by synchronizing an external clock to a system clock. Typically, the digital phase lock loop is initialized with a starting clock rate that may be generated by digital logic. However, the digital logic used to generate the starting clock rate often includes complex computational hardware units and often consumes valuable circuit space and system power. Accordingly, there is a need for an improved system and method to generate an initial clock rate for a digital phase lock loop.